In a complementary metal-oxide-semiconductor (CMOS) integrated-circuit (IC) systems with extreme constrains on area and power consumption, a monolithic implementation of clock oscillator is essential.
A ring of digital logic gate with negative feed-back, (e.g. ring oscillator) is one of the possible monolithic implementation of an oscillator, and the oscillation frequency is inversely proportional to the sum of each logic gates' delay. The oscillation frequency range can cover from a few mega-hertz to giga-hertz. However, the ring oscillator suffers from huge deviation in its oscillation frequency as environmental conditions change. Therefore, the ring oscillator is almost always used with a frequency locking system such as phase-locked loop where an external reference clock is required.
For a mid-to-high frequency range, inductor-capacitor (LC) tuned oscillator is a popular choice for a time reference. Since both inductors and capacitors do not generate any intrinsic noises, the LC tuned oscillator has one of the best frequency stability. However, although modern CMOS fabrication process provides well-controlled on-chip inductance, inductors occupy significant die area that is sometimes not acceptable for an area-limited application. This becomes worse as the target oscillation frequency goes low because of the inverse proportionality between inductance and the oscillation frequency.
For a low-to-mid frequency range, a resistor-capacitor (RC) pair is another choice for a time reference. Relaxation oscillator is one of the most widely studied and implemented oscillators that utilize readily available RC time reference on a CMOS fabrication process. Since a large RC time constant can be implemented on chip more readily than a large LC value, this oscillator occupies smaller area than LC tuned oscillator. However, monolithic relaxation oscillator circuits also suffer from large errors in oscillation period due to process and temperature variation. Beside the capacitance and resistance, the threshold value of a threshold device is also affected by process and temperature variations. An automatic offset canceling technique can be used in order to compensate for the threshold variation. However, since offset canceling techniques are based on switched-capacitor circuits, offset canceling requires an additional clock signal.
In a relaxation oscillator, a capacitor is periodically charged and discharged by a resistor (or a current source). The timing when to switch between charging and discharging is provided by threshold devices, e.g. CMOS comparators. The oscillation period is directly proportional to the capacitance-resistance product (or capacitance-to-current ratio).
Process variation affects the absolute value of the capacitance-resistance product and may cause errors as large as ±25%. However, this error can be significantly reduced if on-chip calibration for the capacitor (or resistor) is employed. Temperature variation commonly causes an increase of the capacitance-resistance product as temperature rises. This variation can be compensated for by device with a complementary temperature dependency.
A need therefore exists to provide a relaxation oscillator that seeks to address at least one of the above-mentioned problems.